Job Title: Analog Design Engineer

Job Location: Santa Clara, CA(Work onsite at least 3 days/wk)

Job Duration: Long-Term Job Description

Responsibilities Will Include

Design/implement various state-of-the-art, high-speed (32+Gbps) analog/mixed-signal blocks for memory interface PHYs
Deliver detailed specifications & documentation
Develop initial circuit schematics and work closely with layout designers to drive designs to completion (including physical verification and backend/reliability flows)
Drive design and layout reviews to ensure quality of deliverables and mitigate overall risk
Work closely with various disciplines (e.g. Layout, Logical Design, Physical Design, Firmware, and Design Verification) to ensure successful cross-team engagement and high-quality execution

The successful candidate will possess:

Solid knowledge in fundamental analog design techniques.
Good knowledge in high-speed SerDes design (signaling/equalization techniques, analog/mixed-signal circuit design, and signal integrity)
Familiarity with advanced, deep submicron semiconductor technologies (experience with FinFET technology a plus)
Solid knowledge of industry-standard tools and practices for analog/mixed-signal and high-speed digital designs (e.g., HSPICE simulator, Cadence design environment)
Analytical thinking and inventive spirit in combination with a solid understanding of risks and risk mitigation
Strong/effective communication skills
Enthusiastic team-first mentality
Experience with Unix/Linux environments

Education:

BS + ~5 years, MS + ~3 years, or PhD with relevant experience in electrical engineering and/or computer architecture