Experience:
- 2- 6 years of Relevant Experience
Work Location : Bangalore
Requirements
- Enrolled in a bachelor’s or master’s program in Electrical/Electronic Engineering with good grades in the relevant courses.
- Have an in-depth understanding of analog circuit design concepts and an ability to innovate and debug circuits.
- Should have done relevant coursework in device physics, MOS transistors, and analog circuit design like op-amps, current mirrors, differential amplifiers, etc.
- Good understanding of concepts like DC operating point, frequency response, stability, noise, and nonlinearity (INL, DNL, THD).
- Working knowledge of Cadence Virtuoso suite – Schematic, Maestro, ADEXL, Layout XL, and Spectre /AMS simulations.
- Good communication skills and effective teamwork.
Responsibilities
- Work closely with analog design lead to design, verify, and debug analog blocks like bias circuits, bandgap references, temperature sensors, IO buffers, ADC, DACs, etc.
- Work with the layout engineer to deliver block GDS and run LPE simulations.
- Motivation to work in a multi-disciplinary team for SoC development.
