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Engineer/Senior Engineer Mixed Signal Verification

 In your new role you will:

  • Contribute to projects verification activities by defining verification plan, setting up verification metrics, executing verification plan in digital and mixed-signal environments, and generating required reports
  • Create new and improve existing verification environments
  • Apply methodologies (e.g. Universal Verification Methodology UVM /UVM-AMS) and execute tests in these environments on RTL, gate-level and mixed-signal designs
  • Closely cooperate with analogue and digital designers as well as concept and verification engineers

 You are best equipped for this task if you have:

  • A degree in Electronics Engineering or similar field of studies, if possible with specific knowledge in semiconductor development. Entry level candidates with suitable qualifications may also apply for this position.
  • Good knowledge of VHDL, Verilog, C
  • Good knowledge of Unix programming languages such as Shell, Perl, TCL,etc
  • Curious and eager to learn
  • Fluent English communication is mandatory

It is an advantage if you have:

  • Functional verification experience using UVM methodology
  • Knowledge of analogue & mixed-signal IC verification methodologies and tools (e.g. XA/VCS, AMS-Designer, …)

Driving decarbonization and digitalization. Together.

Infineon designs, develops, manufactures, and markets a broad range of semiconductors and semiconductor-based solutions, focusing on key markets in the automotive, industrial, and consumer sectors. Its products range from standard components to special components for digital, analog, and mixed-signal applications to customer-specific solutions together with the appropriate software. 
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Location: Singapore, Singapore, Singapore
Company: Infineon Technologies

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