Mixed Signal Modeling/Verification Engineer
ONSITE
FULL_TIME
SENIOR_LEVEL
$170,700 to $300,200
Key Qualifications
Strong fundamentals in analog/RF circuit concepts/topologies.
Expert in RNM coding in SystemVerilog.
Experience working with Cadence mixed signal verification environment.
Ability to read analog schematics and extract related main functionality.
Experience modeling mixed signal/RF blocks including biasing networks, power regulators, bandgaps, Opamp’s, OTA’s, data converters, LNA, PA, mixers, couplers, splitters, combiners, etc…
Experience modeling high frequency PLL’s is desired.
BS + 10 years of relevant industry experience is required.
Description
• Development of RNM RF/Analog models in System Verilog.
• Develop models with self-checking techniques.
• Assess required model accuracy level depending on verification goals.
• Develop appropriate assertions to enforce analog/digital specs are respected and provide digital verification passing criteria.
• Work with Analog designers setting up AMS simulation environment.
• Debug complex chip digital-on-top testbenches and seek root causes for failures.
Education & Experience
BS + 10 years of relevant industry experience is required. MSEE or beyond is preferred.
Coursework emphasis on the design of analog/RF building blocks is nice to have
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $170,700 and $300,200, and your base pay will depend on your skills, qualifications, experience, and location.
Strong fundamentals in analog/RF circuit concepts/topologies.
Expert in RNM coding in SystemVerilog.
Experience working with Cadence mixed signal verification environment.
Ability to read analog schematics and extract related main functionality.
Experience modeling mixed signal/RF blocks including biasing networks, power regulators, bandgaps, Opamp’s, OTA’s, data converters, LNA, PA, mixers, couplers, splitters, combiners, etc…
Experience modeling high frequency PLL’s is desired.
BS + 10 years of relevant industry experience is required.
Description
• Development of RNM RF/Analog models in System Verilog.
• Develop models with self-checking techniques.
• Assess required model accuracy level depending on verification goals.
• Develop appropriate assertions to enforce analog/digital specs are respected and provide digital verification passing criteria.
• Work with Analog designers setting up AMS simulation environment.
• Debug complex chip digital-on-top testbenches and seek root causes for failures.
Education & Experience
BS + 10 years of relevant industry experience is required. MSEE or beyond is preferred.
Coursework emphasis on the design of analog/RF building blocks is nice to have
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $170,700 and $300,200, and your base pay will depend on your skills, qualifications, experience, and location.
