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Principal Analog/Mixed-Signal Engineer

ONSITE FULL_TIME SENIOR_LEVEL $162,000 to $255,000
Synaptics is looking for a SerDes architecture and circuit design expert for the Interface Products Group. In this role, you will be responsible for the design of 40+ Gbps PAM SerDes interfaces for next-generation video and data connectivity technologies. This position reports to the Director, Mixed Signal Design.

Millions of people experience Synaptics every day. Our technology impacts how people see, hear, touch, and engage with a wide range of IoT applications -- at home, at work, in the car or on the go.

We solve complex challenges alongside the most influential companies in the industry, using the most advanced algorithms in areas such as machine learning, biometrics and video processing, combined with world class software and silicon development.

The typical base pay range for this position is USD $162,000 - $255,000 per year. Individual pay is determined by many factors including work location, job-related skills, experience, and relevant education or training. This position is also eligible for a discretionary annual performance bonus, equity, and other benefits. Note that compensation listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.

Responsibilities

Job Duties

  • Design system architecture and analysis of 40+Gbps PAM SerDes
  • Circuit architecture of Receiver/Transmitter PHYs and clocking
  • Analyze power, performance, area, and system tradeoffs for different circuit architectures
  • Lead design, modeling, simulation and analysis of high-speed receivers and transmitters, high performance PLLs and clock distribution circuits along with supporting circuits such as opamps, voltage regulators, voltage references, and other analog circuits 

Competencies

  • Expertise in Matlab or equivalent SerDes design and analysis tool suites
  • You should have expertise in architecture, design, modeling, analysis and simulation of high-speed receiver, transmitter and PLL circuits
  • Remain current with new and evolving technologies via formal training and self-directed education, certification
  • Excellent communication, presentation, and interpersonal skills, including the ability to communicate complex, interactive concepts clearly 
  • Resourceful and able to solve complex problems through adaptation of existing technology and investigation of new technology to resolve complex problems
  • Independent self-starter; able to complete projects on time with minimal guidance
  • Excellent analytical and documentation skills 
  • Ability to work with dynamic, geographically distributed teams, with the passion to help strengthen the team’s skills by providing mentorship of junior engineers

Qualifications

  • Master’s or PhD in Electrical Engineering or related field, or equivalent
  • 15+ years of industry experience in all aspects of SerDes design from system architecture, circuit architecture to circuit design, analysis, modeling, and verification
  • Demonstrated circuit proficiency: CTLE, DFE, FFE, CDR, LC-VCO, high-speed ADC design
  • Track record of developing 40Gbps or higher PAM SerDes receiver, transmitter and PLL designs
  • No travel required
Belief in Diversity

Synaptics is an Equal Opportunity Employer committed to workforce diversity. Qualified applicants will receive consideration without regard to race, sex, sexual orientation, gender identity, national origin, color, age, religion, protected veteran or disability status, or genetic information.
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Location: San Jose, CA, US
Company: Synaptics Incorporated

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