About Aeonsemi:
Founded in October 2018 by technology leaders in mixed signal, DSP, and systems design, Aeonsemi solves complex technical challenges in networking, computing, wireless infrastructure, industrial, and automotive applications with industry leading IC solutions.
Position:
We are looking for talented analog/mixed-signal design engineers to develop cutting edge high-speed communication and timing ICs. The candidate must have a proven record of designing complex ICs in state-of-the-art CMOS process technologies and successfully taken products into volume production.
Responsibilities:
- Architects, designs, and verifies circuits to meet product requirements
- Supervise layout designer, hands-on layout of critical circuits when needed
- Support product definition, test program development, and lab characterization
Requirements:
- M.S. or Ph.D. in Electrical Engineering with minimum 2 years of experience
- Strong fundamentals in circuit theory, signal processing, and physical design
- Advanced understanding of device noise, mismatch, linearity, and other impairments
- Experience designing three or more of the following: ADCs, DACs, Filters, PLLs, DLLs, High-speed I/O, Clock and Data Recovery
- Proficient in Cadence design environment
- Works well within a team
- Excellent written and verbal communication skills
- Python or other programming language preferred
Company Perks & Benefits:
- Competitive salary with annual base pay range $120k ~ $200k
- Equity award at a rapid growth startup company
- Medical, dental, and vision benefits
- 401k Plan and matching
- Paid parental leave
- Flexible paid time off
Location can be either:
Santa Clara, California, or Portland, OR
Send resume to: jobs@aeonsemi.com
